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  ? semiconductor components industries, llc, 2014 april, 2014 ? rev. 0 1 publication order number: ncv4264?2c/d NCV4264-2C low i q low dropout linear regulator the ncv4264?2c is a low quiescent current consumption ldo regulator. its output stage supplies 100 ma with  2.0% output voltage accuracy. maximum dropout voltage is 500 mv at 100 ma load current. it is internally protected against 45 v input transients, input supply reversal, output overcurrent faults, and excess die temperature. no external components are required to enable these features. features ? 3.3 v and 5.0 v fixed output ?  2.0% output accuracy, over full temperature range ? 33  a typical quiescent current ? 500 mv maximum dropout voltage at 100 ma load current ? wide input voltage operating range of 4.5 v to 45 v ? internal fault protection ? ?42 v reverse voltage ? short circuit/overcurrent ? thermal overload ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable ? this is a pb?free device sot?223 st suffix case 318e pin connections http://onsemi.com marking diagram x = 5 (5.0 v version) = 3 (3.3 v version) a = assembly location y = year w = work week  = pb?free package (top view) tab v in gnd v out see detailed ordering and shipping information in the packag e dimensions section on page 9 of this data sheet. ordering information 2 3 tab 1 1 ayw 642cx   (*note: microdot may be in either location) 1
ncv4264?2c http://onsemi.com 2 in + - error amp out gnd figure 1. block diagram 1.3 v reference thermal shutdown pin function description pin no. symbol function 1 v in unregulated input voltage; 4.5 v to 45 v. 2 gnd ground; substrate. 3 v out regulated output voltage; collector of the internal pnp pass transistor. tab gnd ground; substrate and best thermal connection to the die. operating range rating symbol min max unit v in , dc input operating voltage (note 3) v in 4.5 +45 v junction temperature operating range t j ?40 +150 c functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresses beyond th e recommended operating ranges limits may affect device reliability. maximum ratings rating symbol min max unit v in , dc input voltage v in ?42 +45 v v out , dc voltage v out ?0.3 +32 v storage t emperature t stg ?55 +150 c moisture sensitivity level msl 3 ? esd capability, human body model (note 1) v esdhb 4000 ? v esd capability, machine model (note 1) v esdmim 200 ? v lead temperature soldering reflow (smd styles only), lead free (note 2) t sld ? 265 pk c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be af fected. 1. this device series incorporates esd protection and is tested by the following methods: esd hbm tested per aec?q100?002 (eia/jesd22?a 1 14c) esd mm tested per aec?q100?003 (eia/jesd22?a 1 15c) 2. lead free, 60 sec ? 150 sec above 217 c, 40 sec max at peak. 3. see specific conditions for dc operating input voltage lower than 4.5 v in electrical characteristics table at page 3
ncv4264?2c http://onsemi.com 3 thermal resistance parameter symbol min max unit junction?to?ambient sot?223 r  ja ? 109 (note 4) c/w junction?to?tab (psi?jl4) sot?223  jl4 ? 10.9 electrical characteristics (v in = 13.5 v, t j = ?40 c to +150 c, unless otherwise noted.) characteristic symbol test conditions min typ max unit output v oltage 5.0 v version v out 5.0 ma  i out  100 ma (note 5) 6.0 v  v in  28 v 4.900 5.000 5.100 v output v oltage 3.3 v version v out 5.0 ma  i out  100 ma (note 5) 4.5 v  v in  28 v 3.234 3.300 3.366 v output v oltage 3.3 v version v out i out = 5 ma, v in = 4 v (note 7) 3.234 3.300 3.366 v line regulation 5.0 v version  v out vs. v in i out = 5.0 ma 6.0 v  v in  28 v ?30 5.0 +30 mv line regulation 3.3 v version  v out vs. v in i out = 5.0 ma 4.5 v  v in  28 v ?30 5.0 +30 mv load regulation  v out vs. i out 1.0 ma  i out  100 ma (note 5) ?40 5.0 +40 mv dropout voltage ? 5.0 v v ersion v in ?v out i out = 100 ma (notes 5 & 6) ? 270 500 mv quiescent current i q i out = 100  a t j = 25 c t j = ?40 c to +85 c t j = ?40 c to 150 c ? ? ? 33 33 33 55 60 70  a active ground current i g(on) i out = 50 ma (note 5) ? 1.5 4.0 ma power supply rejection psrr v ripple = 0.5 v p?p , f = 100 hz ? 67 ? db protection current limit i out(lim) v out = 4.5 v (5.0 v version) (note 5) v out = 3.0 v (3.3 v version) (note 5) 150 150 ? ? 500 500 ma short circuit current limit i out(sc) v out = 0 v (note 5) 40 ? 500 ma thermal shutdown threshold t tsd (note 7) 150 ? 200 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. 1 oz., 100 mm 2 copper area. 5. use pulse loading to limit power dissipation. 6. dropout voltage = (v in ?v out ), measured when the output voltage has dropped 100 mv relative to the nominal value obtained with v in = 13.5 v. 7. not tested in production. limits are guaranteed by design. figure 2. applications circuit 4264?2c 13 2 v out c out 10  f ? 5.0 v v ersion 22  f ? 3.3 v v ersion output c in 100 nf gnd 4.5?45 v input v in
ncv4264?2c http://onsemi.com 4 typical characteristic curves ? 5 v version figure 3. output stability with output capacitor esr (5.0 v version) 4.90 4.95 5.00 5.05 5.10 ?40 0 80 120 160 figure 4. output voltage vs. junction temperature (5.0 v version) t j , junction temperature ( c) v q , output voltage (v) v i = 13.5 v r l = 1 k  0 1 3 4 6 04610 figure 5. output voltage vs. input voltage (5.0 v version) v i , input voltage (v) v q , output voltage (v) r l = 50  t j = 25 c i q , output current (ma) 50 60 30 10 0 0.01 10 100 esr (  ) 100 80 stable region c q 10  f 0.1 unstable region 1 figure 6. dropout voltage vs. output current (only 5.0 v version) i q , output current (ma) 150 125 100 25 0 0 50 100 150 250 350 400 v dr , dropout voltage (mv) 200 300 figure 7. maximum output current vs. input voltage (5.0 v version) v i , input voltage (v) 45 30 20 5 0 0 50 150 250 300 350 i q , output current (ma) 100 200 20 40 70 90 40 123 5 7 9 8 2 5 50 75 t j = 25 c t j = 125 c t j = ?40 c 10 15 25 35 40 v q = 0 v t j = 25 c
ncv4264?2c http://onsemi.com 5 typical characteristic curves ? 5 v version figure 8. quies cent current vs. output current (5.0 v version) (high load) i q , output current (ma) 150 100 50 0 0 0.5 1.0 1.5 2.0 3.5 i q , quiescent current (ma) 2.5 3.0 figure 9. quiescent current vs. output current (5.0 v version) (low load) i q , output current (ma) 5 4 3 2 1 0 0 10 20 30 40 50 100 i q , quiescent current (  a) 4.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 01020 40 figure 10. quiescent current vs. input voltage (5.0 v version) v i , input voltage (v) i q , quiescent current (ma) r l = 50  r l = 100  25 30 60 70 80 90 515 35 v i = 13.5 v t j = 25 c v i = 13.5 v t j = 25 c t j = 25 c
ncv4264?2c http://onsemi.com 6 typical characteristic curves ? 3.3 v version figure 11. output stability with output capacitor esr (3.3 v version) i q , output current (ma) 100 80 70 50 30 20 10 0 0.01 0.1 10 100 figure 12. output voltage vs. junction temperature (3.3 v version) t j , junction temperature ( c) 40 0 ?40 3.24 3.26 3.28 3.30 3.32 3.34 3.36 figure 13. output voltage vs. input voltage (3.3 v version) figure 14. maximum output current vs. input voltage (3.3 v version) v i , input voltage (v) v i , input voltage (v) 8 7 6 5 3 2 1 0 0 1 4 35 30 25 20 15 10 5 0 0 50 150 200 250 350 esr (  ) v q , output voltage (v) v q , output voltage (v) i q , output current (ma) 1 80 120 160 v i = 13.5 v r l = 660  10 2 45 figure 15. quiescent current vs. input voltage (3.3 v version) input voltage (v) 40 35 30 20 15 10 5 0 0 0.2 0.6 1.0 1.4 1.6 2.0 i q , quiescent current (ma) 25 40 60 90 stable region c q 22  f unstable region 49 r l = 33  t j = 25 c 3 40 100 300 v q = 0 v t j = 25 c t j = 25 c r l = 50  r l = 100  0.4 0.8 1.2 1.8
ncv4264?2c http://onsemi.com 7 typical characteristic curves ? 3.3 v version figure 16. quiescent current vs. output current (3.3 v version) (high load) i q , output current (ma) 150 100 50 0 0 0.5 2.0 3.0 4.0 i q , quiescent current (ma) v i = 13.5 v t j = 25 c 1.0 1.5 2.5 3.5 figure 17. quiescent current vs. output current (3.3 v version) (low load) i q , output current (ma) 5 3 1 0 0 10 50 70 100 i q , quiescent current (  a) v i = 13.5 v t j = 25 c 20 30 60 80 24 40 90
ncv4264?2c http://onsemi.com 8 circuit description the ncv4264?2c is is a low quiescent current consumption ldo regulator. its output stage supplies 100 ma with  2.0% output voltage accuracy. maximum dropout voltage is 500 mv at 100 ma load current. it is internally protected against 45 v input transients, input supply reversal, output overcurrent faults, and excess die temperature. no external components are required to enable these features. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v out ) and drives the base of a pnp series pass transistor by a buffer. the reference is a bandgap design to give it a temperature?stable output. saturation control of the pnp is a function of the load current and input voltage. oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. regulator stability considerations the input capacitor c i1 in figure 2 is necessary for compensating input line reactance. possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately 1  in series with c i2 . the output or compensation capacitor, c out helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. tantalum, aluminum electrolytic, film, or ceramic capacitors are all acceptable solutions, however, attention must be paid to esr constraints. the capacitor manufacturer ?s data sheet usually provides this information. the value for the output capacitor c out shown in figure 2 should work for most applications; however, it is not necessarily the optimized solution. stability is guaranteed at values of c q  10  f, with an esr  3.5  for the 5.0 v version, and c q  22  f with an esr  3.35  for the 3.3 v version within the operating temperature range. actual limits are shown in a graph in the typical performance characteristics section. calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 3) is: p d(max)   v in(max)  v out(min) *i q(max)
v i(max) *i q (eq. 1) where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i q(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i q(max) . once the value of p d(max) is known, the maximum permissible value of r  ja can be calculated: p  ja  ( 150 c  t a ) p d (eq. 2) the value of r  ja can then be compared with those in the package section of the data sheet. those packages with r  ja ?s less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. the current flow and voltages are shown in the measurement circuit diagram. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r  ja : r  ja  r  jc
r  cs
r  sa (eq. 3) where: r  jc = the junction?to?case thermal resistance, r  cs = the case?to?heat sink thermal resistance, and r  sa = the heat sink?to?ambient thermal resistance. r  jc appears in the package section of the data sheet. like r  ja , it too is a function of package type. r  cs and r  sa are functions of the package type, heatsink and the interface between them. these values appear in data sheets of heatsink manufacturers. thermal, mounting, and heat sinking are discussed in the on semiconductor application note an1040/d, available on the on semiconductor website.
ncv4264?2c http://onsemi.com 9 0.1 1 10 100 1000 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 40 60 80 100 140 160 180 0 100 200 300 400 500 600 700 figure 18. r  ja vs. copper spreader area copper heat spreader area (mm 2 ) r  ja , thermal resistance ( c/w) figure 19. single pulse heating curve pulse time (sec) r (t) ( c/w) 120 1 oz 2 oz cu area 100 mm 2 , 1 oz ordering information device package shipping ? ncv4264?2cst50t3g sot?223 (pb?free) 4000 / tape & reel ncv4264?2cst33t3g sot?223 (pb?free) 4000 / tape & reel ?for information on tape and reel specifications, including part orientation and tap e sizes, please refer to our tape and reel packaging specification brochure, brd801 1/d.
ncv4264?2c http://onsemi.com 10 package dimensions sot?223 (to?261) case 318e?04 issue n 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inch. h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0   l l 0.20 ??? ??? 0.008 ??? ??? on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent? marking.pdf. s cillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circui t, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data she ets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for e ach customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designe d, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any o ther application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such u nintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this l iterature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncv4264?2c/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your lo cal sales representative


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